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Asutosh Srivastava

Asutosh Srivastava
Asutosh Srivastava
Assistant Professor
Centre/School/Special Centre
School of Computer & Systems Sciences
Room No
12
Email
asutosh[at]mail[dot]jnu[dot]ac[dot]in
Personal Webpage
http://www.jnu.ac.in
Qualifications

M. E., Electrical and Electronics Engineering, Nanyang Technological University, Singapore.
Ph. D., Electronics and Telecommunication Engineering, Jadavpur University.

Areas of Interest/Specialization

VLSI/Nano-electronics, CAD/EDA tools in VLSI design, Chips for and AI in VLSI design
Chief Investigator at JNU for Chip 2 Startup (C2S) program under MietY.

Experience

Assistant Professor, School of Computers & Systems Sciences, JNU (Feb 2014 - till date). 
Associate Professor, Department of Electronics and Communication Engineering, PDPM-Indian Institute for Information Technology, Jabalpur (2012 - 2014)
Assistant Professor, Department of Electronics and Communication Engineering, PDPM-Indian Institute for Information Technology, Jabalpur (2009 - 2012)
Lecturer, Electrical and Electronics Engineering Department, Birla Institute for Science and Technology, Pilani (Dec. 2005 - 2009)

Awards & Honours

Nanyang Technological University, Singapore
CERN, Switzerland, France
DST-JSPS - Tokyo Institute for Technology, Japan
Jenesys- VLSI Design Center, University of Tokyo
IUSSTF-Electrical Engineering, Yale University, USA

International Collaboration/Consultancy

Professor Masahiro Fujita, VLSI Design and Education Center, University of Tokyo, Japan

Professor Manoj Sachdev, Department of Electrical and Computer Engineering, University of Waterloo, Canada

Best Peer Reviewed Publications

* A. Srivastava et.al., , " Study of La-Incorporated HfO2 MIM Structure Fabricated Using PLD System for Analog/Mixed Signal Applications", IEEE Transaction on Nanotechnology, Vol.14(4) (2015), pp.612-618.

* A.Srivastava, Partha Sarkar, C. K. Sarkar, “Study in variation of Gate Dielectric permittivity with different EOT on channel engineered Deep Sub-micrometer n-MOSFET Device for Mixed Signal Applications” Microelectronics Reliability, vol.49(4) (2009), pp. 365–370.

* D. Zade, S. Sato, K. Kakushima, A. Srivastava, P. Ahmet, K. Tsutsui, A. Nishiyama, N. Sugii, K. Natori, T. Hattori, C. K. Sarkar, and H. Iwai “Effects of La2O3 incorporation in HfO2 gated nMOSFETs on low-frequency noise” Microelectronics Reliability, 51(4) (2011), pp. 746-750. 

Recent Peer Reviewed Journals/Books

James E. Morris & Krzysztof Iniewski (editors), "Nanoelectronic Device Applications Handbook", (Devices, Circuits, and Systems) CRC Press (Taylor & Francis Group) ISBN 9781466565234 Article in Section II Nano-CMOS Technology 

Patents (if any)

NA